SDE
Interview Date
14-08-2026
Result
Pending
Difficulty
Medium
Rounds
01
Drive Type
Off-Campus
Topics asked
Detailed experience
"You are building a custom memory allocator for a hard real-time avionics control loop where dynamic memory fragmentation cannot exceed deterministic bounds": The interviewer barred standard slab allocators and demanded zero worst-case execution time jitter; I walked through implementing a Two-Level Segregated Fit (TLSF) allocator, detailing how first-level and second-level bitmasks indexed with count-leading-zeros (CLZ) assembly instructions yield guaranteed O(1) allocation and deallocation without unbounded free-list traversal. "A globally replicated database must provide strict serializability without relying on synchronized atomic clocks or central sequencers": The panel asked how to arbitrate conflicting multi-shard transactions across continents without incurring multi-round consensus deadlocks; I walked through the Calvin consensus architecture, explaining its decoupled deterministic sequencing layer that orders transactions via Paxos before execution, paired with an Active-Active deterministic lock manager that grants locks strictly in global sequence order to eliminate two-phase commit overhead. "Design an on-die cache coherence protocol for a 64-core heterogeneous SoC mixing high-performance compute cores with low-power real-time microcontrollers": The interviewer challenged me on why snooping protocols fail over large crossbars; I framed the solution around a directory-based MOESI protocol using non-inclusive, shared Last-Level Cache (LLC) directory slices, detailing write-back hazard states, silent eviction handling of clean lines, and distributed token forwarding to avoid starvation during heavy inter-core invalidation storms.