25:I[344796,["/_next/static/chunks/083cs_iw_ie0y.js","/_next/static/chunks/2sk2f47durg8o.js","/_next/static/chunks/00mfjk9z2ewie.js","/_next/static/chunks/0ynk8uq7fqs0l.js","/_next/static/chunks/0uf80u9-0x190.js","/_next/static/chunks/0fxdv63hya-rx.js","/_next/static/chunks/2qcnia-og0qh0.js","/_next/static/chunks/10fiiv3_svxbv.js"],"default"] 24:T405,{"@context":"https://schema.org","@type":"LearningResource","learningResourceType":"Coding Question","name":"Minimum 2x1 Multiplexers to Implement an XYZ D Flip-Flop","description":"You are designing a synchronous sequential circuit for a single-bit state element. The state is held in a D flip-flop whose current output is Q(t) and whose next-state output is Q(t+1) . The circuit has three primary inputs X , Y , and Z , and the next state is defined by the following excitation table: X Y Z Q(t+1) 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 Q(t) 1 0 1 Q(t)' 1 1 0 Q(t)' 1 1 1 Q(t) Here Q(t)' denotes the complement of the current flip-flop output. You must realise the next-state combi","educationalLevel":"medium","about":{"@type":"Organization","name":"Cisco_24july"},"provider":{"@type":"Organization","name":"OAHelper","url":"https://oahelper.in"},"isPartOf":{"@type":"WebSite","name":"OAHelper","url":"https://oahelper.in"},"url":"https://oahelper.in/problems/NTIxNHww/minimum-2x1-multiplexers-to-implement-an-xyz-d-flip-flop"}26:T78e,

You are designing a synchronous sequential circuit for a single-bit state element. The state is held in a D flip-flop whose current output is Q(t) and whose next-state output is Q(t+1). The circuit has three primary inputs X, Y, and Z, and the next state is defined by the following excitation table:

X	Y	Z	Q(t+1)
0	0	0	1
0	0	1	0
0	1	0	0
0	1	1	1
1	0	0	Q(t)
1	0	1	Q(t)'
1	1	0	Q(t)'
1	1	1	Q(t)

Here Q(t)' denotes the complement of the current flip-flop output.

You must realise the next-state combinational logic that drives the D input of the flip-flop using only 2×1 multiplexers. Complemented forms of the primary inputs and of the state (that is, Q(t)', available directly from the flip-flop) may be used freely as data or select signals; inverters do not count toward the total. Each 2×1 multiplexer computes out = S' · I0 + S · I1, where S is its select line and I0, I1 are its two data inputs.

Using a D flip-flop and the minimum number of 2×1 multiplexers, how many 2×1 multiplexers are required to implement the excitation table above?

Pick ONE option:

Your program should print the number that answers the question.

27:T771,# Minimum 2x1 Multiplexers to Implement an XYZ D Flip-Flop ## Problem Description You are designing a synchronous sequential circuit for a single-bit state element. The state is held in a D flip-flop whose current output is $ Q(t) $ and whose next-state output is $ Q(t+1) $. The circuit has three primary inputs $ X $, $ Y $, and $ Z $, and the next state is defined by the following excitation table: | X | Y | Z | Q(t+1) | |---|---|---|--------| | 0 | 0 | 0 | 1 | | 0 | 0 | 1 | 0 | | 0 | 1 | 0 | 0 | | 0 | 1 | 1 | 1 | | 1 | 0 | 0 | Q(t) | | 1 | 0 | 1 | Q(t)' | | 1 | 1 | 0 | Q(t)' | | 1 | 1 | 1 | Q(t) | Here $ Q(t)' $ denotes the complement of the current flip-flop output. You must realise the next-state combinational logic that drives the D input of the flip-flop using only 2×1 multiplexers. Complemented forms of the primary inputs and of the state (that is, $ Q(t)' $, available directly from the flip-flop) may be used freely as data or select signals; inverters do not count toward the total. Each 2×1 multiplexer computes $ \text{out} = S' \cdot I_0 + S \cdot I_1 $, where $ S $ is its select line and $ I_0, I_1 $ are its two data inputs. ## Input and Output This is a fixed-design problem with no conventional runtime input. The circuit is fully specified by the excitation table. Your program should output the minimum number of 2×1 multiplexers required. ## Constraints - The circuit uses a D flip-flop. - Only 2×1 multiplexers are counted toward the required total. - The complemented primary inputs and $ Q(t)' $ may be used directly. - The available answer choices are 3, 4, 2, and 5. ## Notes - No sample input/output examples are provided; the problem is a multiple-choice hardware design question. - The correct answer is 3 (as confirmed by the grounded facts). ## Output Format Print the number that answers the question.1c:[["$","script",null,{"type":"application/ld+json","dangerouslySetInnerHTML":{"__html":"$24"}}],["$","script",null,{"type":"application/ld+json","dangerouslySetInnerHTML":{"__html":"{\"@context\":\"https://schema.org\",\"@type\":\"BreadcrumbList\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https://oahelper.in/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Problems\",\"item\":\"https://oahelper.in/problems\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"Minimum 2x1 Multiplexers to Implement an XYZ D Flip-Flop\",\"item\":\"https://oahelper.in/problems/NTIxNHww/minimum-2x1-multiplexers-to-implement-an-xyz-d-flip-flop\"}]}"}}],["$","section",null,{"className":"sr-only","aria-hidden":"true","children":[["$","p",null,{"children":["Company: ","Cisco_24july"]}],["$","p",null,{"children":["Difficulty: ","medium"]}],false,["$","div",null,{"children":[["$","h2",null,{"children":"Problem Statement"}],["$","p",null,{"children":"You are designing a synchronous sequential circuit for a single-bit state element. The state is held in a D flip-flop whose current output is Q(t) and whose next-state output is Q(t+1) . The circuit has three primary inputs X , Y , and Z , and the next state is defined by the following excitation table: X Y Z Q(t+1) 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 Q(t) 1 0 1 Q(t)' 1 1 0 Q(t)' 1 1 1 Q(t) Here Q(t)' denotes the complement of the current flip-flop output. You must realise the next-state combinational logic that drives the D input of the flip-flop using only 2×1 multiplexers . Complemented forms of the primary inputs and of the state (that is, Q(t)' , available directly from the flip-flop) may be used freely as data or select signals; inverters do not count toward the total. Each 2×1 multiplexer computes out = S' · I0 + S · I1 , where S is its select line and I0 , I1 are its two data inputs. Using a D flip-flop and the minimum number of 2×1 multiplexer"}]]}],false,["$","nav",null,{"aria-label":"Related company pages","children":[["$","$Lb",null,{"href":"/company-questions/cisco24july","children":["More ","Cisco_24july"," OA questions"]}],["$","$Lb",null,{"href":"/interview-experiences","children":"Interview experiences"}]]}]]}],["$","$L25",null,{"id":"NTIxNHww","initialQuestion":{"id":"NTIxNHww","title":"Minimum 2x1 Multiplexers to Implement an XYZ D Flip-Flop","google_doc_link":null,"problem_statement":"$26","solution_cpp":null,"solution_python":"def main():\n # Correct option: the minimum number of 2x1 multiplexers needed is 3.\n print(3)\n\n\nif __name__ == \"__main__\":\n main()\n","solution_java":null,"pregiven_code_cpp":null,"pregiven_code_python":"def solve():\n # Return the number of the correct option.\n pass\n\n\ndef main():\n result = solve()\n if result is not None:\n print(result)\n\n\nif __name__ == \"__main__\":\n main()\n","pregiven_code_java":null,"difficulty":"medium","question_type":"mcq","premium_required":0,"created_at":"2026-07-24T21:32:30.958629+00:00","updated_at":"2026-08-10T14:05:45.94986+00:00","solution_code":null,"solution":null,"pregiven_code":null,"input_test_case":"[\"\", \"\"]","output_test_case":"[\"3\", \"3\"]","lc_tags":"[\"Digital Logic\", \"Multiplexer\", \"Flip-Flop\", \"Boolean Algebra\"]","visual_animation":null,"difficulty_score":45,"md_problem_statement":"$27","unique_company_name":"cisco","sql_solution":null,"bash_solution":null,"js_solution":null,"editorial":null,"hidden_test_cases_blob_count":null,"youtube_tutorial":null,"prompt_solution":null,"campus_type":"on_campus","college_name":"IIT BHU","role":null,"hidden_test_cases_ref":null,"is_mock_oa":false,"publication_status":"published","has_image":true,"company_name":"Cisco_24july","is_first_in_company":true,"company_ref":"MTYxNHww","total_test_cases":15,"hidden_test_cases_count":13},"isQotdToday":false,"qotdReward":5}]]